1. Field of the Invention
The present invention relates to an oscillator for generating oscillation clock having desired frequency, a frequency multiplier for multiplying frequency of a given reference signal and a test apparatus for testing an electronic device.
2. Related Art
Frequency of carrier waves and clock signals for use in high-speed telecommunications for example is being remarkably increased lately. It is then necessary to reduce spurious and phase noise caused in the signal in order to guarantee high-precision operation using such high-frequency signal. Conventionally, such high-frequency signal has been generated by means of a PLL (Phase Lock Loop).
However, while the PLL generates the high-frequency signal by means of a voltage controlled oscillator (VCO), high technology and a number of times of trial design are essential in order to improve a Q-value of the VCO and its development cost becomes high. Still more, because the PLL is highly sensitive to noise, it is liable to be influenced by inner-chip noise and substrate coupling noise and it is difficult to isolate it from such noises.
It is also difficult to design the VCO having a high Q-value in average due to dispersion among elements in implementing the PLL on chip. When a LC tank circuit method is used in the VCO, an area where inductive elements and capacitive elements are disposed becomes extremely large, pressing an area to be used for other circuits such as a logic circuit.